The present invention relates to a feedback differential amplifier circuit suitable for monolithic integration and enabling the variation of the frequency characteristic by controlling capacitance in a peaking circuit.
FIG. 5 illustrates a differential amplifying circuit using a conventional peaking circuit. In the figure, 1a is an input terminal receiving an input signal Vin, 1b is an input terminal receiving a reversed input signal [Vin], 2a is an output terminal outputting an output signal Vout, 2b is an output terminal outputting a reversed output signal [Vout], 3a and 3b are differential coupled transistors, 4a and 4b are load resistors, 5a and 5b are feedback resistors, 6 is a capacitor, 7 is a source of current, 8 is a power terminal at a lower electric potential and 9 is a power terminal at a higher electric potential.
As shown in articles (e.g. Hans M. Rein, "Silicon Bipolar Integrated Circuits for Multigigabit-per-second Lightwave Communications", JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL.8, No.9, SEPTEMBER 1990, pp.1371-1378), such a differential amplifying circuit using a peaking circuit as shown in FIG. 5 is known conventionally. In such a circuit, it is intended to realize wide-band operation by supplying a feedback signal to the differential coupled transistors 3a and 3b through the feedback resistors 5a and 5b, and additionally even more wide-band operation by using the capacitor 6.
In such a circuit configuration, however, the peaking effect on the differential amplifying circuit is determined by a product (Re.times.Ce) of time constants of the feedback resistors and the capacitor and the internal time constant of the differential coupled transistors. Re is the value of the feedback resistors 5a and 5b, and Ce is the value of the capacitor 6.
Consequently, when designing a circuit by simulation and so on, optimization is performed by setting up internal parameters of transistors, etc. In this case, however, there is a defect in that discrepancy of optimized values caused by dispersion of elements may occur when the circuit is realized in a monolithic integration, with the result that the optimum frequency characteristic cannot be obtained.